Why Hybrid Bonding is the Future of Packaging

Hybrid bonding, the technology behind AMD's 3D V-Cache, changes semiconductor packaging. Here's how it really works. Become a supporter on Patreon: https://www.patreon.com/c/user?u=46978634 Follow me on Twitter/X: https://twitter.com/highyieldYT Follow me on Bsky: https://bsky.app/profile/highyield.bsky.social SemiAnalysis articles Part 1: https://semianalysis.com/2021/12/15/advanced-packaging-part-1-pad-limited/ Part 2: https://semianalysis.com/2022/01/06/advanced-packaging-part-2-review/ Part 3: https://semianalysis.com/2022/01/19/advanced-packaging-part-3-intels/ Part 4: https://semianalysis.com/2022/11/01/the-future-of-packaging-gets-blurry/ Part 5: https://semianalysis.com/2024/02/09/hybrid-bonding-process-flow-advanced/ 0:00 Intro 1:11 History of solder based packaging 3:48 Hybrid Bonding 5:58 Direct copper-to-copper bonding 8:01 Why hybrid bonding needs a FAB / TSMC SoIC 9:42 Wafer-to-Wafer & Chip-to-Wafer / Die-to-Wafer 12:59 1st gen 3D V-Cache Process Flow / Zen3D 17:06 How a 7800X3D die really looks like 18:38 2nd gen 3D V-Cache Process Flow / Zen 5 X3D 20:57 How a 9800X3D die really looks like 21:45 Power delivery & TSVs 22:58 AMD's next-gen packaging